Lead Systems Engineer -High Speed Interconnect IPs. - Be at the Forefront of Cutting-Edge Silicon Innovation
Employer
Cadence Design Systems
Salary
$131k-$244k (estimated pay)
Location
San Jose, CA
Employment Type
Full-time
Сategory
Computer Programmers
Description
Exciting opportunity to join a dynamic IP team leading the development of cutting-edge digital and mixed signal IP and subsystem products.
Benefits
- paid vacation
- paid holidays
- 401(k) plan with employer match
- employee stock purchase plan
- medical, dental, and vision plan options
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